As recent technological progress in a large-scale integrated circuit (LSI) device has been advanced, a system LSI device such as a system on a chip (SoC) and a microcomputer containing a plurality of circuits, such as processor cores, memories and interface logics, in a single semiconductor chip has been widespread.
LSI devices under manufacture are tested in wafer and package stages to judge whether their operations and/or characteristics are satisfactory or not. In such operation and/or characteristic tests, a semiconductor tester applies test pattern inputs to one or more circuits and checks whether output results are correct or not. Here, the output results means the ones provided from the circuits operated in response to input test patterns. When the test of the LSI devices is carried out in the wafer stage, the test patterns are applied to, and output results are provided from, pins of a probe card kept in contact with their corresponding pads of the LSI devices. The pads are directly or indirectly connected with the circuits in the LSI device.
As LSI devices become larger in scale, test processes become more complicated. Since the system LSI device, in particular, contains various circuits as set forth above, each circuit must be tested. Further, where usable semiconductor testers are different from some circuits under test or temperature conditions are changed for circuits under test, a plurality of test processes are indispensable.
Especially, since pins of the probe card are in contact with the pads several times during the test at the wafer stage, the pads are subjected to damage. That is, when the pins are in contact with the pads, surfaces of the pads made of metal are damaged. As a result, when wires are bonded to the pads of the LSI device and the inner leads of the package in the assembly stage, the wire bonding is unsuccessfully carried out for the heavily damaged pads so that poor quality LSI devices are produced. To avoid the production of such poor quality LSI devices, the pads are made larger in areas to reduce repeated contacts of pins of the probe card with the same points so that contacting points can be changed every time the pins are in contact with the pads. Alternatively, the pads are made larger in areas to accept repeated contacts of the pins with the pads so that bonding points at the assembly stage can be changed from contacting points at the wafer test stage. However, as the pads become larger in area, the LSI device also becomes undesirably larger (as shown in Japanese Patent Publication NO. 08-29451, for instance).